Research output per year
Research output per year
Personal profile
Research Interests
Reconfigurable Computing, FPGA, Hardware-Software Co-Design, Computer Architecture, Performance Estimation, Digital Hardware Design, Hardware Accelerators, Custom Computing
Education/Academic qualification
PhD, Indian Institute of Technology, Delhi
Award Date: 1 Jan 2015
External positions
Post Doctoral Research Fellow, Queens University Belfast
May 2017 → Jan 2019
Visiting Faculty, Indian Institute of Space Science and Technology
Jul 2016 → May 2017
Asst. Professor, National Institute of Technology Goa
Nov 2015 → Jul 2016
Postdoctoral Research Fellow, University of Hong Kong
Jul 2014 → Nov 2015
Research Intern, IRISA Institut de Recherche en Informatique et Systemes Aleatoires
Nov 2011 → May 2012
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Research output
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Low-Latency In Situ Image Analytics With FPGA-Based Quantized Convolutional Neural Network
Wang, M., Lee, K. C. M., Chung, B. M. F., B, S. C. V., Ng, H. C., Wong, J., Shum, H. C., Tsia, K. K. & So, H. K-H., 12 Jan 2021, In: IEEE Transactions on Neural Networks and Learning Systems. 13 p.Research output: Contribution to journal › Article › peer-review
Open AccessFile1 Citation (Scopus)3 Downloads (Pure) -
The VINEYARD Integrated Framework for Hardware Accelerators in the Cloud
Kachris, C., Soudris, D., Mavridis, S., Pavlidakis, M., Symeonidou, C., Kozanitis, C., Bilas, A., Fenacci, D., Bogaraju, S. V., Vandierendonck, H. & Nikolopoulos, D. S., 15 Jul 2018, Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. New York, NY, USA: Association for Computing Machinery, p. 236-243 8 p. (SAMOS '18).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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All-passive pixel super-resolution of time-stretch imaging
Chan, A. C. S., Ng, H-C., B, S. C. V., So, H. K-H., Lam, E. Y. & Tsia, K. K., 17 Mar 2017, In: Scientific Reports. 7, p. 1-11 11 p., 44608 .Research output: Contribution to journal › Article › peer-review
Open AccessFile9 Citations (Scopus)5 Downloads (Pure) -
Hardware acceleration of de novo genome assembly
Varma, B. S. C., Paul, K., M, B. & Lavenier, D., 21 Jan 2017, (E-pub ahead of print) In: International Journal of Embedded Systems. 9, 1, p. 74-89 16 p.Research output: Contribution to journal › Article › peer-review
Open AccessFile2 Citations (Scopus)33 Downloads (Pure) -
High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform
Ng, H. C., Wang, M., Chung, B. M. F., Varma, B. S. C., Jaiswal, M. K., Ho, S. M. H., Tsia, K. K., Shum, H. C. & So, H. K. H., 16 Feb 2017, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). p. 1-6 6 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
2 Citations (Scopus)