This paper presents a compact analog neuron cell incorporating an array of charge-coupledsynapses connected via a common output terminal. The novel silicon synapse is based on a two stage charge-coupled device where the weighting functionality can be integrated into the first stage. A pre-synaptic spike to the second gate allows the charge under the first gate to drift onto the floating diffusion output stage to produce a current, or voltage spike. Parallel defined synapses are each assigned to the left hand side of a current mirror gate where the right hand side feeds into a thresholding inverter. The decay of the membrane potential is mimicked by the charge leakage through a reverse-biased diode, whose model is verified by comparing the simulations and measured data. Spice simulation results show that the proposed neuron cell is capable of capturing the summing and thresholding dynamics of biological neurons.
|Number of pages||7|
|Publication status||Published - 19 Feb 2008|